IEEE

A 9-GHz Low-In-Band Noise Sub-Sampling-Chopper PLL With Charge-Share Canceling Technique

Abstract: This article presents a low-jitter sub-sampling chopper phase-locked loop (SS-CPLL) that incorporates a novel chopping charge pump (C-CP) to mitigate 1/f noise in short-channel devices ...
IEEE

A 8.9 to 10-GHz −97.86-dBc Reference Spur Pulser-Free Continuous Charge Pump Sub-Sampling PLL With Fine-Tunable Dead-Zone Generator in 65-nm CMOS Process

Abstract: A sub-sampling PLL (SSPLL) with a pulser-free continuous charge pump (CCP) and a bootstrap sampling front-end has been developed and the reference spurs can be significantly suppressed by ...