EDN

Easy multiprocessor design with sRIO and MSGQ

For more on Serial RapidIO, see The RapidIO High-Speed Interconnect: A Technical Overview, Using Serial RapidIO for FPGA co-processing, and Partitioning video across multiple DSPs and FPGAs.
EDN

IDT adds preprocessing to SRIO switch for base stations

The architecture of cellular base stations is gradually coalescing around a common theme. A bank of RF front-end cards sends packetized sample data, generally through SRIO (serial RapidI/O) to an ASIC ...
Electronic Design

Intel And SRIO Converge

Intel x86_64 processors are making major inroads into military and avionic areas previously dominated by Power architecture processors. IBM and Freescale's Power architecture was one of the dominant ...
Electronic Design

Design Tip: Use Serial RapidIO To Increase I/O Bandwidth In DSP Applications

As bandwidth requirements for applications increase at rapid rates, they depend on DSPs to provide the real-time signal processing. DSP applications that perform this real-time processing have hard ...
Houston Chronicle

(PRN) TMS320C6455 DSP Enables a Robust Serial RapidIO Ecosystem Driving Higher Bandwidth Interconnect

TI Announces Sampling of TMS320C6455 DSPs and a New EVM Providing 10 Gb/s Serial RapidIO(R) for Video, Telecom and Imaging Infrastructure Applications DALLAS, Feb. 28 /PRNewswire/ -- Continuing its ...